A time-to-digital converter (TDC) with 32-ps resolution and 2.5-/spl mu/s measurement range has been integrated in a 0.8-/spl mu/m BiCMOS process. The TDC is based on a counter with a 100-MHz clock. Two separate time digitizers improve the time resolution by interpolating within the clock period. These interpolators are based on analog dual-slope conversion. According to test results, the single-shot precision of the TDC is better than 30 ps (/spl sigma/-value) and the nonlinearity is less than /spl plusmn/5 ps when input time intervals range from 10 ns to 2.5 /spl mu/s. The conversion time is /spl les/6.3 /spl mu/s. Temperature drift, excluding the temperature dependence of the oscillator, is below /spl plusmn/40 ps in the temperature range of -40 to 60/spl deg/C. The size of this chip, including pads, is 3.5/spl times/3.4 mm/sup 2/ and its power consumption is 350 mW.
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Raisanen-Ruotsalainen et al. (2000) studied this question.
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