The author describes the recent development of two analog CMOS circuits operating at RF frequencies with applications to data communications. One is a four-quadrant analog multiplier which exhibits a 100-MHz bandwidth with a measured linearity error of 0.7% for X and Y inputs of 0.6 and 0.8 V, respectively. The other is a 90/spl deg/ phase shifter which maintains the grain and phase errors of less than 0.5 dB and 3/spl deg/, respectively, for a signal within 40-60-MHz frequency range.
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Bo Song (1986) studied this question.
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