A simple method for characterisation of MOSFETs with appreciable source and drain series resistance is presented. The ratio g/g1/2m of conductance g and transconductance gm is shown to be a linear function of gate bias, whose intercept equals the threshold voltage and whose slope is proportional to the square root of the channel length. The method is illustrated using measurements on 0.4 μm to 1.0 μm channel length LDD transistors.
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Sanjay Jain (1988) studied this question.
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