Since the first reported use of TiW gate as a stopping mask for n+ implantation for GaAs self-aligned gate field effect transistors (SAGFET) in 1981, refractory metal compounds and silicides have found a widespread use in the GaAs SAGFET technology. However, the technique requires that the refractory metal (silicide)/GaAs interface be subjected to a high temperature postimplantation annealing, typically 750–900 °C. The mechanical, metallurgical, and most sensitively the electrical stabilities and reproducibility of the refractory metal (silicide)/GaAs Schottky barrier characteristics have become the major issues confronting the high temperature SAGFET technology. The use of a dielectric substitutional gate, which allows the refractory metal gate to be formed at a low temperature, typically room temperature to 400 °C, for fabrication of SAGFET was reported in 1983. With the advance of well controlled dry etching and photoresist planarization techniques, the low temperature SAGFET process becomes a potentially viable alternate technology. In this paper, comparisons of the two technologies and associated device performances are made. The basic issues of refractory metal/GaAs and dielectric/GaAs interface reactions, stress and impurity incorporation at high annealing temperatures are discussed.
No takes yet. Share an insight, caveat, or question.
S. P. Kwok (1986) studied this question.