Answers are grounded in this paper and cite their sources.
Based on our proposed self-terminating gate recess etching technique, normally-off recess-gated AlGaN/GaN MOSFET has been demonstrated with a novel method using GaN cap layer (CL) as recess mask, which, as a result, simplifies the device fabrication process and lowers the fabrication cost. The GaN CL is capable of acting as an effective recess mask for the gate recess process, which includes a thermal oxidation for 45 min at 650 °C followed by 4-min etching in potassium hydroxide (KOH) at 70 °C. After gate recess process, no obvious change is observed in terms of the surface morphology of the GaN CL, the contact resistance of the Ohmic contact formed directly on the GaN CL as well as the sheet resistance of the two-dimensional electron gas (2-DEG) channel layer under the GaN CL. The fabricated device exhibits a threshold voltage (Vₜₕ)as high as 5 V, a maximum drain current (Idmax)of~ 200mA/mm, a high on/off current ratio of~ 10¹⁰together with a low forward gate leakage current of~ 10⁻⁵mA/mm. Meanwhile, the OFF-state breakdown voltage (Vbr)of the device with gate-drain distance of 6μm is 450 V.
No takes yet. Share an insight, caveat, or question.
Xü et al. (2014) studied this question.
Synapse has enriched 10 related papers. Consider them for comparative context: