A CMOS low-distortion fully differential power amplifier with double nested Miller compensation

A four-stage fully differential power amplifier using a double-nested Miller compensated structure is presented. The multiple-loop configuration used results in a lower harmonic distortion, at least in the audio band, compared to conventional three-stage amplifiers with nested Miller compensation. Design criteria and stability conditions for good stability of amplifiers using a multiple- (greater than two) loop topology are presented. The amplifier operates with a single power supply which has a minimum value of 3 V. With a 5-V supply, power dissipation is 10 mW and total harmonic distortion (THD) is -83 dB for a -V/sub p-p/ differential output signal at 10 kHz and a load of 50 Omega . With an 8 Omega load and for a 10-kHz, 4-V/sub p-p/ output signal, THD is -68 dB. The chip area is 0.625 mm/sup 2/ in a 1.5- mu m single-poly, double-metal, n-well CMOS technology.>