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We investigate endurance degradation in hafnium oxide (HfO₂)-based ferroelectric field effect transistors (FeFETs) by analyzing interface (Nit) and near-interface oxide traps (Nox) using a two-level charge pumping (CP) technique. After 10⁴ program (PG) / erase (ER) cycles at ±5 V, 100 ns,Nitincreases by ~2×, and the memory window (MW) reduces from 1.2 V to 0.45 V. Temperature-dependent measurements reveal accelerated trap generation above 50 °C, with decreasing charge-pumping current (ICPmax) due to deeper oxide trap occupation. Pulse parameter tuning shows that longer rise/fall times, and shorter hold durations mitigateNitaccumulation and delay memory window collapse. The extracted average interface trap density (Dit) reaches ~4×10¹² cm⁻²eV⁻¹ after cycling. These results emphasize the role of trap engineering in improving FeFET endurance for scaled non-volatile memory applications.
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Sk et al. (2025) studied this question.
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