Radiation-induced edge-leakage current in minimum geometry n-channel MOSFETs from five submicron technologies is examined as a function of dose rate. Under worst-case bias, degradation of transistors from the TSMC 0.35-, 0.25-, and 0.18-/spl mu/m processes is more severe following low-dose-rate irradiation than following high-dose-rate irradiation and anneal. The leakage current anneals with an activation energy of /spl sim/1.0 eV, which suggests that charge trapping in the field oxide is associated with shallow defects such as E'/sub /spl delta// centers. A comparison of the device response to a first-order kinetics model for hole trapping and annealing indicates that the enhanced degradation results from slower annealing rates following low-dose-rate irradiation. These results suggest that space charge in the field oxide may contribute to the dose rate sensitivity by altering the spatial distribution of trapped holes. In contrast to the response of the TSMC parts, high-dose-rate irradiation and anneal bounds low-dose-rate degradation of transistors from the HP 0.50- and 0.35-/spl mu/m processes. These results imply that existing qualification approaches based on high-dose-rate irradiation and anneal may not be conservative for the hardness assurance testing of some advanced CMOS devices.
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Witczak et al. (2005) studied this question.
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