Worst-Case Test Conditions of SEGR for Power DMOSFETs

Heavy ion test results show worst-case test conditions for single-event gate rupture (SEGR) of power MOSFETs. Contrary to common belief, the worst-case ion condition for SEGR is not the ion with the deepest penetration depth in the device or highest LET at the die surface, but the ion beams with Bragg peak positioned at or near the interface of the epitaxial layer and the highly doped substrate. The factors that have significant impact on SEGR thresholds are evaluated and discussed. The factors that are considered include: ion beam, drain bias, gate bias, ion species, ion range, surface LET and the construction layer of the power DMOSFET. An estimated worst-case ion range table for krypton, xenon and gold is provided for reference.