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This paper presents the design and optimization of an E-band power amplifier (PA) implemented in Intel's 22FFL FinFET process. Layout optimization and characterization of the PA unit cell yielding optimal millimeter-wave (mmW) performance of the active device are described. A holistic optimization methodology is also presented which co-optimizes efficiency of the active devices and passive networks by incorporating passive losses earlier in the design process. The measured PA achieves a peak gain of 18.6 dB with a 3-dB bandwidth of 62-86 GHz (24 GHz). At 75 GHz, the measured Psat, OP1 dB, and peak power added efficiency (PAE) are +12.6 dBm, +5.7 dBm, and 26.3%, respectively. The PA can amplify a 6-Gb/s 16-QAM signal at an average Pout of +5 dBm with a PAE of 10% and -26-dB EVM(rms) and a 9-Gb/s 64-QAM signal at an average Pout of +1.3 dBm with a PAE of 5% and -28.3-dB EVM(rms). The compact layout of the PA yields a core area of 0.054 mm2, enabling compact integration.
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Callender et al. (2019) studied this question.
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