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This paper describes a fully differential 3-tap finite impulse response filter in 90-nm CMOS. A traditional traveling wave filter topology is modified to alleviate its inherent delay-bandwidth-gain tradeoffs. Each tap gain is comprised of two transconductors whose outputs superimpose with the same group delay, similar to a distributed amplifier. This doubles the bandwidth of the filter for a given tap spacing and gain. Digital control is provided for the tap gains, an integrated pre-amplifier, and tuning varactors. Coupled differential spirals are used in the delay lines to help the design fit into an area 600 /spl mu/m/spl times/500 /spl mu/m. A 1-V supply voltage and 25-mW power consumption are enabled by the use of parallel differential pairs for sign control of the transconductances instead of Gilbert cell amplifiers. The input return loss is better than 16 dB and the output return loss is better than 9 dB up to 30 GHz. Equalization of NRZ data over a coaxial cable channel was demonstrated up to 30 Gb/s, making it faster than any previously reported CMOS equalizer.
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Sewter et al. (2006) studied this question.
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