Answers are grounded in this paper and cite their sources.
We report on a SiO/sub 2/-Ga/sub 2/O/sub 3/ gate insulator stack directly grown on n-type GaN by the photoelectrochemical oxidation method. The resultant MOS devices are fabricated using standard photolithography and liftoff techniques. The effect of annealing temperature on the SiO/sub 2/-Ga/sub 2/O/sub 3//n-type GaN MOS devices is investigated. The properties of high breakdown field, low gate leakage current, and low interface state density are investigated for the MOS devices.
No takes yet. Share an insight, caveat, or question.
Lee et al. (2003) studied this question.
Synapse has enriched 10 related papers. Consider them for comparative context: