Scaling considerations and dielectric breakdown improvement of a corrugated capacitor cell for a future dRAM

Further scaling of a corrugated capacitor cell (CCC) consisting of a moat capacitor is discussed in terms of cell configuration and device parameters. From the results of experimental analyses and device simulation, key parameters of cell scaling are suggested. In addition to the cell scalability, some improvements in dielectric breakdown of the capacitor insulator are described. This insulator integrity is a key issue for the reliability of dRAM's having a CCC.