Effect of Gate Voltage on Hot-Carrier-Induced On-Resistance Degradation in High-Voltage n-Type Lateral Diffused Metal–Oxide–Semiconductor Transistors

The phenomenon and mechanism of hot-carrier-induced on-resistance ( R on ) degradation for the n-type lateral diffused metal–oxide–semiconductor (MOS) transistors stressed under various gate voltages ( V g ) are investigated. R on degradation of the device is found to be attributed to the interface state ( N it ) generation in the N - drift region. Moreover, R on degradation is almost identical for the devices stressed under medium V g and high V g , despite the fact that bulk current of the device is much greater at high V g bias. Such an anomalous R on degradation is suggested to be the result of two combined factors: the magnitude of impact ionization rate and N it generation efficiency.