Ir/Ca 0.2 Sr 0.8 Bi 2 Ta 2 O 9 (CSBT)/HfO 2 /Si ferroelectric-gate field-effect transistors (FeFETs), which were appropriate for low-voltage 3.3 V operations, were developed. The key to the success was the use of N 2 -dominant gas mixed with a small amount of O 2 in a gas flow during the annealing of the FeFETs at 780 °C for CSBT polycrystallization. The Ir gate was newly developed for overcoming the problem of Pt peeling off from the CSBT surface during the novel annealing process. For maximizing the memory windows of the FeFETs, the optimum flow rate of O 2 mixed with 1000-sccm-fixed N 2 was found to be as low as 0.5 sccm. The novel annealing process suppressed the SiO 2 interfacial layer growth to 2.6 nm thickness. The annealing also improved CSBT ferroelectricity. A 10 9 cycle endurance and a 10 5 s retention were demonstrated by 3.3 V writing of the FeFETs.
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Zhang et al. (2017) studied this question.
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