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A chip set for a 40 Gb/s fiber optical communication system has been designed and fabricated. On-wafer measurements have been performed to verify circuit operations. As far as available measurement capabilities show, all circuits are functionally fulfilling specifications for 10 Gb/s operation at less than or equal to 3 V supply voltage. During the design phase especially the influence of interconnects on signal integrity was investigated and the results were implemented for automatic extraction. All the circuits were operational after the first processing round. No redesign was necessary.
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Mokhtari et al. (1997) studied this question.
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