Answers are grounded in this paper and cite their sources.
This paper presents a bidirectional variable gain amplifier (BVGA) with a low imbalance between amplification directions in 65-nm CMOS process. The BVGA is composed of two symmetric bidirectional amplifiers (BA) and a distributed attenuator (DA) for a low directional imbalance. The amplification direction is changed by the switching supply and ground voltages of a common gate amplifier in the BA. Switchable matching networks are designed with self-switching n-channel CMOS (NMOS) transistors in order to eliminate two single-pole-double-throw switches. The BVGA gain is controlled by the gate bias voltage of three NMOS varistors in the DA. Shunt inductors under the NMOS varistors are used to minimize the phase imbalance owing to the DA attenuation. The total chip size is 1848 × 628 μm2including pads. The gains of the BVGA are 2.3-11.5 dB and return loss is <;-6 dB at 7 GHz. The 3-dB bandwidth of the BVGA is 2 GHz that is from 6 to 8 GHz. The measured output 1-dB power compression point and minimum noise figure are 4.6 dBm and 6.7 dB. The measured gain and phase directional imbalances are <;0.1 dB and <;4° in the C-band. The power consumption of the BVGA is 72.5 mW.
No takes yet. Share an insight, caveat, or question.
Suh et al. (2018) studied this question.
Synapse has enriched 5 related papers. Consider them for comparative context: