A Physics-Based Compact Model for Ultrathin Black Phosphorus FETs—Part I: Effect of Contacts, Temperature, Ambipolarity, and Traps

We report a physics-based surface-potential compact model to describe current-voltage (I-V) relationship in a few-layered ambipolar black phosphorus (BP) transistors. To model the device electrostatics, the 2-D density of states of carriers and Fermi-Dirac statistics are used, while carrier transport is described using the drift-diffusion formalism. The model also comprehends the effects of interface traps and voltage-dependent Schottkytype source/drain contact resistances. Compared with prior BP FET models that are mainly suited for near-equilibrium transport and room-temperature operation, the model developed here is applicable over broad bias and temperature range. Validation of the model against measurement data of BP transistors with gate lengths 300-1000 nm and operating temperature from 200-298 K is demonstrated in a companion article.