An extremely low loss switch IC has been implemented by using a 0.15 /spl mu/m-gate super self-aligned FET with reduced drain/source area. Both off-state-capacitance and the specific on-resistance of the implemented FET have been dramatically reduced by the novel device structure. The experimentally fabricated switch IC showed the low insertion loss of 0.25 dB at an added power of 35 dBm at a frequency of 0.9 GHz, which is the lowest value ever reported.
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Makioka et al. (2001) studied this question.
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