A simple MOS model that is suitable for hand calculations, but which includes the effect of normal and tangential electric fields on carrier mobility, is described. This device model is derived from semiphysical models for the field dependence of carrier mobility to accurately predict the effect of reduced dimensions. Fitting parameters for n-channel transistors were extracted. The model is used to examine the effect of reduced mobility at high electric fields on logic switching speed and device transconductance.
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Garverick et al. (1987) studied this question.
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