A 0.5-GHz CMOS digital RF memory chip

In the application of digital RF memory (DRFM) chips for radar jamming, an RF signal is sampled, stored in random access memory (RAM) and later recreated from the stored data. A CMOS (l/SUB eff/=1 /spl mu/m) DRFM chip is described that integrates static RAM, control circuitry, and two channels of shift registers on a single chip. The sample rate achieved was 0.5 GHz. VLSI density was made possible by the low-power dissipation of quiescent CMOS circuits. An 8K RAM prototype chip has been built and tested.