A CMOS logarithmic intermediate-frequency (IF) amplifier that is applied to mobile telecommunications equipment is presented. The CMOS logarithmic IF amplifier has pseudologarithmic rectifiers made from parallel-connecting full-wave rectifiers, consisting of unbalanced source-coupled pairs with the cross-coupled input stage and parallel-connected output stage. A +or-3-dB logarithmic accuracy, a 90-dB input dynamic range, and a -30 to 80 degrees C operating temperature range were achieved with the 1.3- mu m double-polysilicon n-well CMOS process. Typical power consumption by the logarithmic IF amplifier in the fabricated CMOS LSI was 5.5 mW. The block area for the logarithmic IF amplifier was 0.8 mm/sup 2/.>
No takes yet. Share an insight, caveat, or question.
Katsuji Kimura (1993) studied this question.
Synapse has enriched 5 related papers. Consider them for comparative context: