Field Enhancement for Dielectric Layer of High-Voltage Devices on Silicon on Insulator

Based on the continuity theorem of electric displacement including interface charges, the enhanced dielectric layer field (ENDIF) for silicon-on-insulator (SOI) high-voltage devices is proposed. The following three approaches for enhancing the dielectric layer electric field EIto increase the vertical breakdown voltage of a device VB,Vare presented: 1) using a thin silicon layer with a high critical electric field ES,C; 2) introducing a low-permittivity dielectric buried layer; and 3) implementing interface charges between the silicon and the dielectric layer. Considering the threshold energy of silicon epsivT, the formula of ES,Con silicon layer thickness tSis first obtained, which increases sharply with a decrease of tS, and reaches up to 141 V/mum at tS= 0.1 mum. Expressions for EIand VByV are given, which agree well with simulative and experimental results. Based on the ENDIF, the new device structures are given, and an EIvalue of 300 V/mum has been experimentally obtained for double-sided trench SOI. Moreover, several conventional SOI devices are explained well by ENDIF.