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State-of-the-art integrated circuits currently involve multi-layered architectures that rapidly extend towards three-dimensional (3D) semiconductor structures. To overcome out-of-plane alignment issues, we present an original method to employ conventional deep-UV lithography on pre-structured silicon substrates to pattern an etch mask for monolithic 3D nanostructures with N layers using only M = 1 overlay alignment step (instead of M = (N - 1) steps as in layer-by-layer assembly). The target nanostructures studied here consist of arrays of pores that intersect at oblique angles. To this end, we project elliptical apertures on the sidewalls of V-trenches at controllable depths relative to the wafer's top surface. We create V-trenches in Si by hot HF 50% and KOH 25% etching with θ = 54.7° sloping sidewalls. We successfully spin-coat photoresist on the sloping V-trench sidewalls with a thickness between 50 and 800 nm. The photoresist is remarkably homogeneous, better than 4 nm along 2.6μm of the V-trench sidewall. Using a single deep-UV lithography exposure at λ= 193nm (with a 25 mJ/cm 2 dose and a nominal focal plane at 500 nm depth below the Si wafer top-surface) we successfully expose apertures at various depths in the photoresist on sloping sidewall surfaces of the V-trenches. The apertures have diameters between d = 180 nm and 509 nm, to as deep as Z = 1180nm below the wafer surface. We develop an analytical model to successfully describe lithographic exposure on an inclined surface, which allows one to sculpt non-planar aperture arrays on inclined surfaces. In the future, aperture arrays on inclined surfaces may serve as etch masks to create monolithic and controllable 3D nanostructures deep inside silicon with a reduced number of overlay alignment steps, thus increasing the yield and throughput, and reducing costs and use of chemical and material resources.
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Grishina et al. (2026) studied this question.
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