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High-resolution SAR ADCs are widely used in low-power mixed-signal systems but suffer from comparator offset errors that degrade conversion accuracy. This paper presents a 14-bit SAR ADC employing an intra-conversion adaptive LMS calibration technique that updates the offset estimate after each comparator decision within a conversion cycle. A confidence-aware monitoring unit, retry controller, and golden-code verification mechanism further enhance reliability. Implemented in 180-nm CMOS and verified using Cadence Virtuoso, the proposed ADC achieves 13.02-bit ENOB, 80.15 dB SNDR, and 82.92 dB SFDR, demonstrating improved accuracy and robustness with minimal hardware overhead.
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Sadamkar et al. (2026) studied this question.
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