Study on Linear Active Disturbance Rejection Control for Current Regulation in a Fast‐Frequency Pulsed Welding Power Supply

Fast‐frequency pulsed welding power supplies require current regulation across changing load and dc‐bus conditions. This study develops an application‐oriented linear active disturbance rejection control (LADRC) implementation for a dual‐path phase‐shifted full‐bridge (PSFB) source rated at 400 A dc plus 150 A pulsed current. A control‐oriented model distinguishes load‐dependent damping, commutation duty loss, and analog‐to‐digital converter (ADC) and pulse‐width modulation (PWM) scaling from the nominal controller gain. A first‐order regulator with a second‐order linear extended state observer is implemented on an STM32G474 with a 20‐μs control period. Hardware comparisons include a local incremental proportional–integral (PI) gain scan and repeated electrical tests. In the 400 A branch, the 50 and 100 A step rise times decrease by 25.1% and 28.9%, respectively, although LADRC is not faster at every operating point. Between fixed dc‐bus levels of 544 and 420 V, the mean rise‐time drift over the 30–200 A subset is 15.7% for LADRC and 56.0% for PI. In the pulse branch, the tabulated pulse counts indicate a 45.5% reduction in mean recovery time. The mean amplitude coefficient of variation across three 100‐pulse acquisitions decreases from 4.13% to 1.28% at the tested 50 A operating point. These results establish application‐specific electrical performance, rather than parameter‐independent closed‐loop dynamics or validated welding‐quality gains.