This work enhances p-type conductivity by utilizing the polarization effect in GaN, suggesting better performance for complementary logic circuits.
The E-mode GaN p-FET exhibits low current density and high on-resistance, which hinders the development of GaN complementary logic circuits. This work exploits the polarization effect to enhance the p-type conductivity in the p-GaN layer: two AlN layers are inserted in the p-GaN layer, and the polarization field separates EA and EF of the p-GaN layer underneath each AlN, leading to enhanced acceptor ionization and a formation of two-dimensional hole gas (2DHG) above the AlN layer. Therefore, the extrinsic resistance of the GaN p-FET is reduced. In the gate region, the upper AlN layer can serve as an etch-stop layer to optimize the gate recess process, and the bottom AlN layer can induce a high-density hole channel above it during the on-state. The fabricated GaN p-FET exhibits an E-mode operation with a threshold voltage (Vth) of −2.8 V, a large on-state current density (ION) of 12.5 mA/mm, and a low effective on-resistance (Ron) of 401 Ω mm. The Vth–Imax performance is among the best in literature.
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Qi et al. (2025) studied this question.
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