p-GaN Gate HEMTs on 6-Inch Sapphire by CMOS-Compatible Process: A Promising Game Changer for Power Electronics

The ≥ 650 V power electronics market penetration by GaN HEMTs on Si has been impeded by the GaN buffer. Recently, GaN-on-sapphire, a promising solution, attracts great attentions. In this work, p-GaN gate HEMTs are successfully manufactured on 6-inch sapphire by CMOS-compatible process in our pilot line. Device process modules of p-GaN selective etching, low-temperature Ohmic contact, and Al 2 O 3 /SiO 2 passivation have all be realized. The fabricated devices with L GD of 16 μm and a simplified epitaxy and device structure, feature a low R ON of 14.8 Ω.mm, a high V TH of 2 V, and a high OFF-state breakdown voltage ( BV ) over 1360 V. Further, the nonuniformity of the R ON and V TH across the 6-inch whole wafer is well controlled. Devices also passed the preliminary reliability assessment of high temperature gate bias (HTGB) stress and high temperature reverse bias (HTRB) stress. The high-reliability, high-uniformity, and low-cost p-GaN gate HEMTs on 6-inch sapphire will probably be a strong driven force for the power electronics market in the near future.