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An Island-Ohmic p -GaN gate (IO-PGaN) structure is proposed and fabricated on a GaN-on-Si wafer. Compared to the conventional Schottky- gate p -GaN HEMTs, the "floating" p -GaN layer is connected with the gate terminal via the heavily doped p +-GaN island in the IO-PGaN devices. A JFET-like structure formed by the Schottky-metal/ p -GaN junction delivers a self-limited gate leakage. The proposed IO-PGaN HEMT alleviates the performance trade-off between the Ohmic- and Schottky gate technologies, delivering a limited gate leakage and a stable V TH under gate/drain voltage stress conditions. Moreover, a TCAD simulation result and an energy band diagram are provided to illuminate the principle of enhanced V TH stability of IO-PGaN devices.
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Dai et al. (2024) studied this question.
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