Laminated Ferroelectric FET With Large Memory Window and High Reliability

In this work, we report a planar Si-based ferroelectric field-effect transistor (FEFET) characterized by a high memory window (MW) of 4.79 V, ten-year retention, and pass disturb-free characteristics. This achievement is realized through the use of a 20-nm-thick laminated Hf <tex-math notation="LaTeX">_0.5 </tex-math> Zr0.5O2 (L-HZO) film with Al2O3 (AO)-insertion layers (ILs). The 2.4-Å-thick AO-ILs effectively severed the bulk-HZO film and scaled down each FE-thickness ( <tex-math notation="LaTeX">tFE </tex-math> ) in the L-HZO. This resulted in suppression of non-FE monoclinic phase formation to less than 10%, and more notably, an increase in the coercive field ( <tex-math notation="LaTeX">EC </tex-math> ) within the FE stack. With an increase in the number of HZO-lamination ( <tex-math notation="LaTeX">NHZO </tex-math> ), the <tex-math notation="LaTeX">EC </tex-math> was enhanced by 76% in L-HZO ( <tex-math notation="LaTeX">NHZO </tex-math> = 4) compared to single-HZO (S-HZO). This led to an increase in effective polarization ( <tex-math notation="LaTeX">Peff </tex-math> ), representing the portion of remnant polarization ( <tex-math notation="LaTeX">Pᵣ </tex-math> ) uncompensated by channel-injected charge, thereby validly influencing the threshold voltage ( <tex-math notation="LaTeX">VT </tex-math> ) shift of FEFET. The augmented <tex-math notation="LaTeX">Peff </tex-math> in L-HZO (350% increase compared to S-HZO) was directly confirmed through a more pronounced <tex-math notation="LaTeX">VT </tex-math> shift by the change of <tex-math notation="LaTeX">Pᵣ </tex-math> , which was 230% steeper in L-HZO compared to S-HZO. The revealed mechanism behind the enhanced MW and reliability in laminated-FE, stemming from the increased <tex-math notation="LaTeX">Peff </tex-math> rooted in enlarged <tex-math notation="LaTeX">EC </tex-math> , paves the way for designing the FE-stack for high-density memory or neuromorphic applications.