Monolithic 3D Integration using BEOL FeFET: Reliability, Thermal Effects, and DNN Accuracy

In this paper, we demonstrate the impact of different chip integration techniques such as 2D, heterogeneous 3D(H3D), and monolithic 3D(M3D) on the reliability of compute-in-memory (CiM) architectures for the deep neural network (DNN). The emerging non-volatile memory ferroelectric FET (FeFET) is used for CiM. Further, we present a comprehensive thermal modeling of 2D, H3D, and M3D chips and how induced temperature degrades the accuracy of DNN. To achieve that, we have modified the open-source "DNN+NeuroSim" framework by incorporating Fe-FDSOI transistors for 2D and H3D designs and integrating back-end-of-line (BEOL) FeFETs for M3D configurations. Subsequently, we used this modified framework to assess essential performance metrics, including throughput, power density, area, etc. We showcase the degradation of 1.82%, 12.53%, and 28.43% in the inference accuracy of the DNN for 2D, H3D, and M3D configurations, respectively.