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Circuit simulation study demonstrates kickback noise reduction techniques in 0.18-micrometer CMOS latched comparators, highlighting improved input signal integrity for analog-to-digital converters.
The latched comparator is a building block of virtually all analog-to-digital converter architectures. It uses a positive feedback mechanism to regenerate the analog input signal into a full-scale digital level. The large voltage variations in the internal nodes are coupled to the input, disturbing the input voltage-this is usually called kickback noise. This brief reviews existing solutions to minimize the kickback noise and proposes two new ones. HSPICE simulations of comparators implemented in a 0.18-/spl mu/m technology demonstrate their effectiveness.
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Figueiredo et al. (2006) studied this question.
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