A lifetime prediction method for hot-carrier degradation in surface-channel p-MOS devices

Hot carrier degradation of p-MOS devices at low gate voltages (V/sub g/<V/sub d/) is examined. It is shown that the electronic gate current is the principal factor in stress damage in this gate voltage range and that the damage itself consists of trapped electrons, localized close to the drain junction. The saturation of the transconductance change as a function of time which is seen at long stress times of high stress voltages results from a change in the injected gate current as a function of time. This is caused by changes in electric field in the silicon due to charge trapping in the oxide during stress. The saturation effect can, however, be transformed into a simple power law if the time axis is multiplied by the square of the instantaneous gate current. This allows for the development of a lifetime-prediction method. The method is applied to 1.0- mu m p-MOS devices, and a lifetime is estimated.<<ETX>>