Design of Monolayer MoS₂ Nanosheet Transistors for Low-Power Applications

This study simulates and compares symmetric and asymmetric MoS2nanosheet transistor structures. The results show that the asymmetric MoS2nanosheet transistor achieves higher current density and better gate control, and thus, this structure is optimized to meet the current density requirement for low-power applications in the International Roadmap for Devices and Systems (IRDS). Dielectric materials of Al2O3and HfO2are investigated, and equivalent oxide thicknesses ranging from 0.8 to 2 nm are analyzed. Transistors with Al2O3as the dielectric exhibit better performance than those with HfO2due to the lower level of remote phonon scattering. The gate length and underlap region are scaled down from 14 to 5 nm and from 7 to 1 nm, respectively, in an attempt to further enhance the ON-current. The substoichiometric metal oxide AlOxis used to induce more electrons in the undoped MoS2channel. AlOxincreases the ON-current with no gate control degradation. After optimization, the transistor demonstrates a subthreshold swing of 62.3 mV/dec, a drain-induced barrier lowering (DIBL) of 21.6 mV/dec, and a current density of495 ~μ A/μ mwith a supply voltage of 0.65 V. Compared with Si gate-all-around transistors, the MoS2nanosheet transistor exhibits excellent gate control, good electrostatics, and comparable current density.