A 168 nW to 44.3 Mb/s Adaptable TRNG With 400 mV Attack-Resilient Hybrid RO Core

This paper presents an adaptable RO-TRNG that removes the fixed power–throughput tradeoff by selecting delay-cell physics at run time. A hybrid core uses a current-starved inverter in low-power (LP) mode to amplify slew-limited jitter for high bit-efficiency at low frequency, and a latched cross-coupled cell in high-performance (HP) mode to exploit regeneration-time jitter over a wider band; both share a unified fast-by-slow sampling path with XOR combining. Fabricated in 180 nm CMOS (265×490 μm), the TRNG spans 0.8–2.0 V and -20–80 ∘C, achieves 168 nW (3.95 pJ/bit) in LP and 44.3 Mbps in HP, and reaches near-ideal HP entropy (0.999999999984). Long datasets pass NIST SP 800-22 (including under 400 mV injection at the second harmonic), SP 800-90B, and AIS31. A single, digitally-tunable IP thus delivers nanowatt standby entropy and burst-mode throughput without architectural change.