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The authors point out that a TEOS/O/sub 3/-oxide layer used as an interlevel dielectric enhances hot-carrier degradation of MOSFETs due to the water-related components (water and/or silanols) contained in the layer. This results mainly from enhanced hot-electron trapping in the gate oxide and also from interface-trap generation. By applying an ECR-SiO/sub 2/ layer under the TEOS/O/sub 3/-oxide layer, tolerance against hot-carrier damage is improved to the level of MOSFETs without the TEOS/O/sub 3/ oxide. From ESR measurement results, it is found that the spin density of the ECR-SiO/sub 2/ film under the TEOS/O/sub 3/ oxide is two orders lower than that of the ECR-SiO/sub 2/ film only. It is suggested that the dangling bonds in the ECR-SiO/sub 2/ film effectively trap water diffusing from the water-containing overlayer.>
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Shimoyama et al. (1993) studied this question.
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