Reliable tantalum-gate fully-depleted-SOI MOSFET technology featuring low-temperature processing

A reliable tantalum (Ta)-gate device technology, which can drastically reduce the number of process steps, has been developed. Ta-gate fully-depleted-silicon-on-insulator (FDSOI) MOSFETs with 0.15-/spl mu/m gate length by low-temperature processing below 500/spl deg/C after the gate oxide formation have good on/off characteristics. Comprehensive design guidelines for Ta-gate MOSFETs in the deep-submicrometer regime is provided by investigating a wide range of performance and reliability constraints on the process temperature and the SOI thickness. In the guideline, the recrystallization of the source/drain region gives inferior limits of the SOI thickness and the process temperature. Thermal reaction between Ta and SiO/sub 2/ films sets a superior limit of the process temperature, and a short-channel effect sets a superior limit of the SOI thickness.