Parametric Sensitivity‐Aware Design and Optimization of Overlap‐Engineered Gate‐All‐Around Silicon Nanowire NCFETs for Low‐Power Applications

A novel high‐ k dielectric based gate‐source‐drain overlap Negative Capacitance Gate‐All‐Around Field Effect Transistor (GSD‐O‐NC‐GAAFET) with sidewall spacers structure is proposed, incorporating lanthanum‐doped HfO 2 as ferroelectric layer. This design achieves higher ON current ( I ON ), ultra‐low OFF current ( I OFF ), enhanced subthreshold swing (SS), and an excellent switching ratio. The proposed device demonstrates an I ON of 1.32 mA, an I OFF of 2.47 × 10 −17 A, and an average SS of 49.4 mV/decade. Moreover, the application of proposed device as an inverter is explored, demonstrating lower propagation delay than existing designs. With these promising characteristics, GSD‐O‐NC‐GAAFET emerges as a strong contender for next‐generation low‐power electronic applications.