Process induced deep-level defects in high purity silicon

Deep-level defects appear in silicon upon heat treatment of wafers with surface disordered by mechanical lapping or introducing high concentration impurity in diffusion layer, i.e. in regimes typical of fabrication of high voltage devices. By means of capacitance transient spectroscopy, combined with other methods, it was shown that dominant electron traps with ionization energies of 0.28 and 0.54 eV of double level donor have low recombination activity, but affect the resistivity of high purity Si and play a key role in limiting the p-n junction breakdown voltage . A careful study of the defect parameters showed their similarity to sulphur-related centres in Si.