Higher order implementation of DA based 2-D adaptive FIR filter using

AbstractIn this paper, higher order implementation of 2-D adaptive FIR filter is done using distributed arithmetic (DA). The logic gates-based architecture followed by the compressor adder is used for the generation of the partial sum. The 2-D Delayed LMS(TDDLMS)algorithm is employed for updating the filter coefficients. In addition, a two-stage pipelining technique is used in thearchitecture to minimize the critical-path delay. The higher-order filter structure is implemented by subdividing it into multiple lower- order filter. ASIC synthesis results demonstrate that the proposed structure achieves better performance compared with previously reported architectures.