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A device simulator is used to analyze the heavy ion induced failure mechanism in insulated gate bipolar transistors (IGBTs) and to investigate hardening solutions. Single event latchup was already identified as the failure mechanism. Lateral and vertical modifications of the P/sup +/ plug are proposed to reduce the efficiency of the parasitic thyristor, responsible for the latchup, and validated by 2D-simulations on a N-channel IGBT cell structure.
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Lorfèvre et al. (1999) studied this question.
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