A New Figure of Merit, Δ VDIBLSS /(I_d, sat /I_sd, leak ) , to Characterize Short-Channel Performance of a Bulk-Si n-Channel FinFET Device

This paper aims to investigate the device parameters, including drain-induced barrier lowering (DIBL), subthreshold swing (SS), and saturation drive current,I_ d, sat, of bulk-Si n-channel FinFET devices (bulk n-FinFETs). The impact of lightly doped drain (LDD) process on the performance of bulk n-FinFETs is also examined in this paper. According to our measured data, excluding LDD in bulk n-FinFETs not only reduces mask costs but it also enables slightly better short-channel control compared to the inclusion of LDD. A new figure of merit,Δ VDIBLSS /(I_ d, sat /I_ sd, leak ), is introduced for monitoring short-channel performance of bulk n-FinFETs, whereΔ VDIBLSSaccounts for the DIBL and SS, andI_ sd, leakis the source/drain subthreshold off-state leakage current.