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Abstract-The combination of tetragonal ZrO2(t-ZrO2) and amorphous Al2O3was explored as the gate dielectric for Si-based MOS devices. Because of the absence of a ZrSiO4and/or ZrSi interfacial layer, the thermally stable t-ZrO2/Al2O3/Si stack is more eligible than the Al2O3/t-ZrO2/Si stack for the gate dielectric since it demonstrates larger capacitance, smaller hysteresis, better frequency dispersion, lower leakage current, and more robust reliability. By employing additional NH3plasma nitridation to well passivate the grain boundaries of the t-ZrO2film, without compromising its κ-value, a greatly reduced leakage current of 2.9 × 10-8A/cm2can be achieved at gate bias of flatband voltage (Vfb)-1 V with an effective oxide thickness of 1.64 nm, which paves a new way to develop a high-performance crystalline gate dielectric for advanced MOS devices.
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Wu et al. (2010) studied this question.
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