An Efficient Hybrid FPGA-Based Design For Artifact Removal in Polysomnographic Records

This is the authors' abstract. We don't add key points for this paper.

An electroencephalogram plays a critical role in assessing brain function. It captures brain activity that is helpful in sleep studies. An electroencephalogram also contributes to diagnosing several disorders, such as epilepsy, sleep apnea, etc. Therefore, noise removal in EEG signals is vital. While recording polysomnographic results, there is considerable probability of interference from other biological signals. Since most electroencephalogram signal applications are real-time, a hardware-based system is preferable. As a result, in this study, an FPGA-based area and power-optimized denoising system is proposed. In this work, a novel integration of an enhanced adaptive noise cancellation filter and optimized Teager-Kaiser energy operator is introduced. The adaptive noise cancellation filter is refined using distributed arithmetic. And the Teager Kaiser energy operator is optimized using approximate multipliers and squarers. This hybrid approach is then compared to other prevailing filtering techniques. This comparison has shown an 267.73% decrease in area for the proposed architecture. The design was simulated and synthesized using Vivado 19.1. The reduction in area and power makes this proposed system better suited for wearable devices for denoising EEG signals.