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Experimental stress analysis demonstrates prolonged gate lifetime at reduced frequency and duty cycle in p-GaN HEMTs, suggesting key design optimizations for power circuits.
In this letter, we present an extensive analysis on the role of both switching frequency (ranging from 100 kHz to 1 MHz) and duty cycle (from 10% to 90%) on the time-dependent gate breakdown of high electron mobility transistors (HEMTs) with Schottky metal to p-GaN gate. More specifically, results show how the gate lifetime of GaN HEMTs increases by reducing the frequency and the duty cycle of the stressing gate signal (VG). Such behavior is ascribed to the OFF-time, which is responsible to alter the electrostatic potential in the p-GaN layer during the rising phases of VG (from OFF- to ON-state). Findings of this analysis are useful both for further technology improvement and for GaN-based power circuit designers.
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Millesimo et al. (2022) studied this question.
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