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A correlation is made between observed photoionization induced avalanche breakdown in epitaxial structures and the analysis of high-current effects in these devices using Poisson's equation. The analysis shows that a photocurrent-stimulated conductivity modulation mechanism can lead to avalanche at the epitaxial-substrate junction at bias levels far below the usual breakdown voltages for the structures. Experimental data are presented for both VDMOS power-FET devices and bipolar npn epitaxial transistors which show junction avalanche at low bias levels.
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Wrobel et al. (1985) studied this question.
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