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Charge trapping in high-/spl kappa/ gate dielectrics affects the result of electrical characterization significantly. DC mobility degradation and device threshold voltage instability and C-V and I-V hysteresis are a few examples. The charging effects in high-/spl kappa/ gate dielectric also affect the validity of conventional reliability test methodologies developed for SiO/sub 2/ devices. In this paper, we review high-/spl kappa/ materials specific phenomena that can affect the validity of constant-voltage-stress-based reliability test methods to address the direction of future reliability study on high-/spl kappa/ devices.
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Lee et al. (2005) studied this question.
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