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A lumped-model approach is used to determine three-dimensional effects that often dominate latchup behavior in complex integrated circuits. A preprocessor is used that automatically generates a SPICE-compatible file of up to several thousand elements from a basic description of the topology and physics of local structures. The results show that internal potential drops in the substrate and isolation wells are much larger than the metallization resistance contribution for devices with asymmetrical topology. The work also shows that alterations in the back contact, such as partial removal of the central portion for backside laser simulation, increase lateral voltage drops in the substrate by more than one order of magnitude, substantially changing the latchup characteristics. The model can be used to calculate distributed potentials that are important for latchup and the latchup window effect and to determine the effect of metal shadowing or nonuniform carrier generation when laser simulation is used.>
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Plaag et al. (1988) studied this question.
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