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Single-event upsets in 1T1R Resistive Random Access Memory (RRAM) structures are experimentally demonstrated by generating current transients in the access transistors of the memory cells. The relationship between the single-event upset threshold of the RRAM and the applied voltage is exponential, which is verified using TPA laser analysis and heavy-ion irradiation. Multiple-Event Upsets (MEUs) also occur, where individual ions incrementally change the RRAM's resistance until their cumulative effect causes an upset. Single-event models are presented that allow direct correlation of the voltage across the RRAM, caused by the ion-generated current transient, and the change in RRAM resistance. The RRAM is vulnerable only in the high resistance state, when a voltage capable of writing to the cell is applied to the bit line. This is approximately 0.5% of the memory element's operation time, leading to relatively low projected upset rates.
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Bennett et al. (2014) studied this question.
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