Answers are grounded in this paper and cite their sources.
In this work, we study the impact of tier pitch scaling, one of the key enablers for increasing density, on the heavy-ion sensitivity of 3D NAND Flash memories using replacement gate technology and charge trap cells. Single-event-effect cross section increases more than proportionally to the reduction in tier pitch, primarily due to the reduction in stored charge. Heavy-ion induced threshold voltage shifts causing the errors are analyzed and discussed, with implications for future generations of non-volatile devices.
No takes yet. Share an insight, caveat, or question.
Bagatin et al. (2024) studied this question.
Synapse has enriched 10 related papers. Consider them for comparative context: